IEEE 2804-2019 PDF
The scope of this standard includes performance estimation accuracy for complex processors like Very Long Instruction Word (VLIW) core and complex contention scenarios, description of caches to include uncached memory regions and caches for subsets of memories, properties for coarse power consumption estimation, and reusability by separating eXtensible Markup Language (XML) files for processor description and other memory/communication-related information.
The Software-Hardware Interface for Multi-Many-core (SHIM) defines an architecture description standard from the software design perspective–this provides a common interface that abstracts the hardware properties that are critical to enable multicore tools.
New IEEE Standard – Active. This standard is intended primarily for tool developers and hardware developers who would use Software Hardware Interface for Multi-Many-core (SHIM) to exchange hardware description for software tools. It also attempts to provide software developers with insights into what hardware information is described in SHIM to foster understanding of the intention and the extent of SHIM.
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