IEEE 1890-2018 PDF
This standard specifies a method to construct two-level low-density parity-check (LDPC) codes and to utilize them as the error correction coding (ECC) scheme in non-volatile memories (NVM). The encoding and decoding methods as well as the implications on memory and overall system latency are presented. The simulation results comparing the two-level code construction scheme and the traditional one-level scheme, as well as the parity check matrices for several LDPC code rates and lengths are provided.
This standard provides a method to utilize error correction coding in non-volatile memories. For this purpose, a two-level code construction method based on LDPC codes along with the decoding method is presented. This scheme outperforms the traditional method, while having slightly higher memory requirements and negligible delay
New IEEE Standard – Active. A two-level code construction scheme for non-volatile memories (NVM) that is based on low-density parity-check codes is specified in this standard. This scheme constructs an auxiliary codeword that encodes a subset of bits from the primary packets stored in an NVM memory unit. The auxiliary codeword is decoded only when the detection of at least one of the primary codewords fails. The encoding and decoding techniques for this scheme are presented. The two-level scheme outperforms the traditional one-level method while it requires only a small memory overhead and negligible latency. Moreover, it outperforms the one-level scheme that uses a code that is twice as long in the low raw bit error rate regime.
Related products
